Physical Design Clocking Engineer
Intel
Opportunity published from Workday · applications stay with the original hiring source.
About the opportunity
As a Physical Design Engineer, you will play a critical role in the implementation of custom IP and SoC designs, transforming RTL to GDS to produce design databases ready for manufacturing.
You will execute various aspects of the physical design flow, including synthesis, place and route, clock tree synthesis, floor planning, and static timing analysis, directly contributing to optimizing power, frequency, and area.
You will join the Data Center Group (DCG), a business unit focused on developing innovative solutions that power the future of computing, cloud services, and high-performance computing environments.
Key responsibilities
- Conduct physical design implementation tasks, including synthesis, place and route, clock tree synthesis, floor planning, and static timing analysis.
- Perform verification and signoff activities, such as equivalence verification, reliability verification, layout verification, and structural design checking.
- Analyze results and provide recommendations to resolve violations for current and future architectures.
- Optimize designs to improve product level parameters, including power, frequency, and area.
- Participate in developing and enhancing physical design methodologies, flows, and automation processes.
- Utilize industry-standard EDA tools to execute and validate physical design processes effectively.
Qualifications
- Bachelor's degree in a relevant field with 0-1 years of hands-on experience in physical design, demonstrating skills gained through internships, academic projects, coursework, or hands-on training OR a Master's degree in a relevant field with no prior professional experience.
- Proficiency in physical design tools, such as synthesis, place and route, and timing analysis software.
- Familiarity with EDA tools and methodologies used in physical design and verification workflows.
Nice to have
- Strong analytical and problem-solving skills to identify and resolve design violations effectively.
- Excellent communication and collaboration abilities to contribute within a dynamic team environment.
- A proactive mindset and eagerness to learn and improve physical design methodologies and flows.
Benefits
- Competitive pay ranging from $105,650.00 to $149,150.00 USD annual salary.
- Stock bonuses.
- Comprehensive health benefit programs.
- Retirement benefit programs.
- Paid vacation time.
Job Type
College Grad
- Shift: Shift 1 (United States of America)
Primary Location
US, California, Santa Clara
Work Model
Hybrid work model (split time between working on-site at assigned Intel site and off-site)
About the company
Intel is a leader in product innovation and delivery, shaping the future of technology and data-centric computing.
The Data Center Group (DCG) provides a collaborative environment driven by technical excellence and a passion for innovation.
Additional information
- Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices.
- We do not charge any fees during our hiring process.
- Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment.
Application: UpVagas lists this opportunity from the hiring company or its recruitment platform. The application is completed at the original source.
