Process Integration Development Engineer – Defect Metrology
Intel
Opportunity published from Workday · applications stay with the original hiring source.
Job Description
Embark with us on a journey of growth and transformation as we create exceptionally engineered technology and bring AI everywhere.
As a valued team member, your adaptability and attention to detail will contribute to our drive for results and relentless pursuit of quality, ensuring we meet our customers' needs with precision.
Join us and build on our legacy of innovation and collaboration as we deliver world‑changing technology that improves the life of every person on the planet.
Life at Intel
https://jobs.intel.com/en/life-at-intel
At Intel's Logic Technology Development (LTD), we have continued to extend Moore's law to be world leaders in computing technology.
To achieve the necessary scaling of our semiconductor manufacturing process, we have led the industry in developing enhancements such as strained silicon for carrier transport enhancement, high-k metal gates, FinFETs, and next-generation Gate-All-Around architectures.
LTD has been at the center of every new development that has kept Moore's Law moving forward.
Defect Metrology plays a key role in the development of every new silicon process technology.
Responsibilities include but are not limited to
- Owning a segment of the process to ensure adequate metrology is placed to detect and respond to all yield-limiting defects prior to reaching end-of-line sort.
- Investigate and respond to exclusionary baseline shifts to ensure segment defect health is restored to capable, demonstrated baseline.
- Develop new recipes and RFCs as part of New Product Introduction (NPI).
- Provide navigation and leadership to meet Intel's yield objectives, utilizing state-of-the-art metrology tools and test vehicles (QTM, Short Loop, etc.).
- Organizing and presenting defect summaries to F25, LTD, MDCE engineering teams.
- Partnering with Intel Integration, Yield, and failure analysis labs to provide root cause for all defect issues.
- Hold the team and collaborators accountable for quality through Integrated Module Team (IMT) and Focus Team (FT) forums.
- Work collaboratively as a part of the overall LTD Defect metrology group.
- Role-model and establish a team culture of trust, collaboration, safety, accountability, and sustaining excellence.
Benefits
- We offer a total compensation package that ranks among the best in the industry.
- It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation.
- Find out more about the benefits of working at Intel .
- Annual Salary Range for jobs which could be performed in the US: $133,800.00-188,890.00 USD
- The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations.
- Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training.
- Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.
Key details from the source
- You will also respond to defect baseline shifts to isolate the root cause and implement preventative actions consistent with 8D methodology.
- Experience would be obtained through a combination of prior education level classes, and current level school classes, projects, research, and relevant previous job and internship experience.
- Minimum of 1+ years of experience with one or more of the following:
- This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.
Full listing
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