Semiconductor Device Modeling Engineer
Intel
Opportunity published from Workday · applications stay with the original hiring source.
About the opportunity
The Compact Device Modeling Group (CDMG) is part of Intel's Design Enablement (DE) organization, enabling internal and external customers to bring winning products to the marketplace faster.
As a Semiconductor Device Modeling Engineer, you will characterize device behavior and generate or update device models for new technologies while ensuring robust and accurate model simulations.
This is an experienced hire position utilizing a hybrid work model, allowing employees to split their time between working on-site and off-site at an assigned Intel location.
Key responsibilities
- Characterize device behavior for new semiconductor technologies.
- Generate and update device models to support advanced process nodes.
- Ensure robust and accurate model simulations for design teams.
- Co-optimize Intel state-of-the-art process technology with diverse design needs.
- Work independently after the initial ramp-up time to deliver best-in-class data-centric applications.
Qualifications
- Master's degree in Electrical Engineering or a related discipline with at least 3+ years of industry experience in the semiconductor field; OR Ph.D. in Electrical Engineering or a related discipline with at least 1 year of industry or research experience and a dissertation focused on semiconductor devices or…
- Hands-on experience in Python, C, or Shell programming.
- Experience or coursework in semiconductor device physics, process flow, layout, and simple circuit design and simulation.
- Ability to work independently after the initial ramp-up time.
Nice to have
- A Ph.D. degree in electrical engineering or a related discipline with 3+ years of industry experience in the semiconductor field.
- Experience in BSIM models, other compact models, extraction tools such as ICCAP or MBP, and commercially available simulators like HSPICE and SPECTRE.
- Understanding of corner, statistical, and sub-circuit models and their usages.
- Understanding of layout effects, models, and layout extractions.
- Understanding of basic analog and digital circuit blocks and model interaction.
Benefits
- Competitive total compensation package including competitive pay and stock bonuses.
- Comprehensive benefit programs including health, retirement, and vacation coverage.
Job Type
Experienced Hire
- Shift: Shift 1 (United States of America)
Primary Location
US, California, Santa Clara
Additional Locations
US, Arizona, Phoenix, US, Oregon, Hillsboro, US, Texas, Austin
Annual Salary Range
- $149,600.00 - $284,580.00 USD
About the company
Intel Corporation is a leading technology company focused on delivering design, development, and manufacturing services that enable innovative technologies and data-centric applications.
Intel is committed to ethical hiring practices and RBA compliance, ensuring no fees are charged during the recruitment process.
Application: UpVagas lists this opportunity from the hiring company or its recruitment platform. The application is completed at the original source.
Key details from the source
- Hands-on experience in semiconductor device DC/CV characterization tools, techniques, and systems, including test automation, RF, noise, and reliability tests.
- Experience in a Cadence design environment, including schematic capture, analog design environment, and Virtuoso layout design, DRC, and LVS.
Full listing
UpVagas condensed repetitive or legal boilerplate to make this page easier to read. The original hiring source contains the complete job description.
