Senior FPGA & Firmware Engineer – SDR

Scottsdale, Arizona, United States Hybrid Posted 3 hours ago

Axon

Opportunity published from Greenhouse · applications stay with the original hiring source.

About the opportunity

Join Axon on a mission to Protect Life, developing software-defined radio and digital signal processing for our mesh and connected-device portfolio.
As a Senior member of the Mesh & Opportunistic Networking team, own the FPGA realization of DSP algorithms from MATLAB/Simulink into synthesizable RTL on a Zynq UltraScale+ MPSoC.
Collaborate with firmware, systems, RF, and product engineering in a hybrid structure to deliver high-performance OFDM modems for public safety.

Key responsibilities

Research, model, and implement SDR and digital communications algorithms like OFDM, FFT/IFFT, channel estimation, MIMO, and LDPC.
Develop floating- and fixed-point behavioral reference models in MATLAB/Simulink and generate RTL using HDL Coder or hand-written VHDL/Verilog.
Implement designs in Vivado through synthesis, place-and-route, and timing closure while managing AXI4 interfaces and clock-domain-crossing logic.
Build verification suites using Simulink/HDL co-simulation, bit-true comparisons, and automated regressions.
Integrate modems with RF transceiver front ends and ARM application cores across heterogeneous SoCs.
Bring up, characterize, and debug hardware using lab instruments such as oscilloscopes, logic analyzers, and spectrum analyzers.
Mentor junior engineers and champion best practices in model-based design and FPGA development.

Qualifications

Bachelor's degree in Electrical Engineering, Computer Engineering, or a similar discipline.
6+ years of industry FPGA/RTL design experience taking logic through synthesis, timing closure, and hardware bring-up.
High proficiency in VHDL and/or Verilog/SystemVerilog and hands-on expertise with the Xilinx/AMD Vivado toolchain.
Demonstrated experience with MATLAB and Simulink for algorithm modeling and model-based design workflows.
Solid foundation in digital signal processing, digital communications, fixed-point arithmetic, and wireless link fundamentals.
Experience with on-chip interconnects like AXI4/AXI4-Stream, clock-domain-crossing design, and RTL verification.
Proficiency with modern AI-assisted development tools and coding assistants like Claude Code, Cursor, and GitHub Copilot.

Nice to have

Master's or PhD in Electrical Engineering, Communications, or Signal Processing.
Production experience with HDL Coder workflows, code generation, and verification.
Hands-on implementation of OFDM modems, channel coding, MIMO, and synchronization in hardware.
Experience designing on Zynq UltraScale+ MPSoC or other heterogeneous SoC/FPGA platforms.
Experience integrating wideband RF transceivers such as Analog Devices ADRV9001/ADRV9002 and DPD.

Benefits

Competitive salary and 401(k) with employer match.
Discretionary paid time off and paid parental leave for all.
Comprehensive medical, dental, and vision plans.
Fitness programs and emotional and mental wellness support.
Learning and development programs.
In-office snacks.

Job details

Location: Boston or Scottsdale offices.
Work status: Hybrid schedule requiring onsite work Tuesday through Friday, with remote flexibility on Mondays.

About the company

Axon is a mission-driven company dedicated to protecting life and solving society's most critical safety and justice issues through an ecosystem of devices and cloud software.
We foster a fast-paced, challenging, and collaborative environment where team members take ownership, drive real change, and build diverse teams reflecting our communities.

Application: UpVagas lists this opportunity from the hiring company or its recruitment platform. The application is completed at the original source.

Key details from the source

Experience with version control in Git and CI for HDL/model-based design.
Experience applying AI coding assistants to FPGA and HDL workflows.

Full listing

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