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Senior Systems Prototyping and Emulation Engineer

Full-time US, CA, Santa Clara On-site Posted 1 hora ago

NVIDIA

Opportunity published from Workday · applications stay with the original hiring source.

About the opportunity

  • We are looking for a Senior Systems Prototyping and Emulation Engineer to join our Emulation team onsite in Santa Clara, CA.

You will craft FPGA prototypes and hardware emulation environments for next-generation GPUs, SOCs, NICs, and Switches using industry-standard platforms, helping to make them faster, more scalable, and more efficient.

  • This role requires working in a fast-paced environment involving cross-geographical team coordination and daily complex problem-solving.

You will enable pre-silicon software development, validation, and performance analysis by building and supporting advanced emulation and prototyping environments.

Key responsibilities

  • Build FPGA prototypes and hardware emulation environments by making RTL friendly, partitioning designs, and managing synthesis, place-and-route, and emulator compilation flows.
  • Improve performance of FPGA prototypes and emulation platforms, analyze timing and performance bottlenecks, and generate bitstreams and images.
  • Bring up designs on FPGA prototyping and hardware emulation platforms and drive complex debug and problem-solving activities.
  • Release prototypes and emulation environments to internal customers and support them through debug, validation, and software enablement.
  • Understand design implementations, define configurations, develop and modify bring-up and testing infrastructure, and verify design correctness.
  • Understand complex system topologies with multiple ASICs to realize DGX systems on prototyping platforms and emulators.
  • Work closely with architects, designers, verification engineers, validation teams, and software teams to accomplish project goals.
  • Enable pre-silicon software development, validation, and performance analysis using FPGA prototypes and hardware emulation environments.
  • Develop and optimize emulation-friendly validation infrastructures, including high-performance software interfaces and scalable debug methodologies.

Qualifications

  • BS in Electrical Engineering, Computer Engineering, or related fields with 8+ years of experience, or MS with 6+ years of proven experience in FPGA prototyping and/or hardware emulation.
  • Strong understanding of FPGA prototyping and hardware emulation architectures, devices, flows, and tools.
  • Hands-on experience with Synopsys ProtoCompiler or Synplify Premier, Xilinx Vivado, and familiarity with emulation platforms such as Synopsys ZeBu or Siemens Veloce.
  • Exposure to ASIC design and verification tools (VCS or equivalent, Verdi, GDB).
  • Knowledge of Verilog, SystemVerilog, and digital design concepts.
  • Understanding of industry-standard protocols such as PCIe, CXL, NVLINK, USB, CHI, and CPU-GPU coherency.
  • Hands-on experience with lab FPGA debug methodologies, tools (Identify or ChipScope), and lab debug equipment (oscilloscopes, logic analyzers).
  • Strong expertise in developing and optimizing emulation-friendly C/C++ testbenches and transactors that operate efficiently at emulation speeds, minimizing host-emulator communication bottlenecks and improving transaction throughput.
  • Ability to develop efficient DPI/PLI/SystemC-based interfaces and software infrastructures that enable high-speed validation, debug, and bring-up on hardware emulation platforms.

Nice to have

  • Scripting knowledge in Perl, shell, Tcl, or Python.
  • Good documentation, communication, and interpersonal skills.
  • Experience with memory bring-up of LPDDR5/6, DDR5/6, CXL/PCIe, and/or high-speed interfaces such as USB4/3.
  • Prior experience with hardware emulation or prototyping platforms (Synopsys HAPS, ZeBu, Siemens Veloce) of a high-performance processor or SOC.
  • Understanding of performance-sensitive validation methodologies for large-scale emulation environments, including efficient logging, synchronization, memory handling, and protocol traffic generation.

Benefits

  • Eligible for equity.
  • Comprehensive benefits package.

Job details

  • Location: Santa Clara, CA (On-site)
  • Base salary range: 168,000 USD - 264,500 USD for Level 4, and 196,000 USD - 310,500 USD for Level 5 (determined based on location, experience, and peer pay).
  • Application deadline: Applications will be accepted at least until October 10, 2026.

About the company

  • NVIDIA has continuously reinvented itself over two decades, starting with the invention of the GPU in 1999, which sparked the PC gaming market, redefined computer graphics, and revolutionized parallel computing.
  • More recently, GPU deep learning ignited modern AI, representing the next era of computing as NVIDIA evolves to tackle hard, world-changing problems.
  • NVIDIA is dedicated to amplifying human imagination and intelligence through its life's work.

Additional information

  • This posting is for an existing vacancy.
  • NVIDIA uses AI tools in its recruiting processes.

Application: UpVagas lists this opportunity from the hiring company or its recruitment platform. The application is completed at the original source.

Key details from the source

  • Experience enabling pre-silicon software validation, firmware bring-up, or system-level debug on emulation platforms.

Full listing

UpVagas condensed repetitive or legal boilerplate to make this page easier to read. The original hiring source contains the complete job description.

Source transparency. UpVagas organizes information provided by the company or recruitment source. Always review the original listing before submitting personal information.
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