Silicon Packaging Design Engineer
Intel
Opportunity published from Workday · applications stay with the original hiring source.
About the opportunity
Join Intel's advanced packaging team to help shape the future of high-performance computing as a Silicon Packaging Design Engineer.
You will design and develop next-generation package substrates that enable industry-leading semiconductor products from initial concept through tapeout.
Working closely with silicon, signal integrity, power delivery, manufacturing, and hardware teams, you will balance electrical performance, manufacturability, cost, and schedule requirements.
This role offers the opportunity to influence cutting-edge packaging technologies that support Intel's most advanced products and platforms.
Key responsibilities
- Design and develop microelectronic package substrates from architecture definition through final tapeout.
- Create and optimize physical package layouts, including high-density routing solutions meeting electrical, mechanical, thermal, and manufacturability requirements.
- Perform substrate feasibility, fit, and routing studies to evaluate design tradeoffs involving performance, complexity, cost, and schedule.
- Define, implement, and maintain substrate design rules while conducting design reviews with internal and external stakeholders.
- Analyze and resolve design rule check (DRC) violations and other layout-related issues to ensure design quality and robustness.
- Collaborate with silicon, package, board, signal integrity, power integrity, and manufacturing teams to optimize pinouts and system-level connectivity.
- Drive continuous improvements in package design methodologies, automation, and best practices.
- Generate and maintain design documentation, technical reports, and engineering deliverables within product lifecycle management systems.
- Support package bring-up, qualification, and debug activities as needed.
Qualifications
- US Citizenship required.
- Ability to obtain US Government TS/SCI Security Clearance.
- Bachelor's degree in Electrical Engineering, Mechanical Engineering, Materials Science, or a related engineering discipline and 6+ months of experience.
- Experience or academic exposure with microelectronic package or PCB physical layout design and manufacturing process.
- Experience with package design tools like Siemens Xpedition, Cadence Allegro Package Design, AutoCAD, or SolidWorks.
- Experience with physical layout aspects of substrate design, including custom layouts, floor plans, or schematic layout conversion.
Nice to have
- Post Graduate degree in Electrical Engineering, Mechanical Engineering, Materials Science, or a related engineering discipline.
- Active US Government TS/SCI Security Clearance.
- Experience with semiconductor package substrate design, package I/O planning, and high-density routing technologies.
- Knowledge of advanced packaging technologies such as flip-chip, 2.5D, 3D packaging, chiplets, embedded bridge, or high-bandwidth interconnect solutions.
- Familiarity with package electrical analysis and simulation tools including HyperLynx, PowerDC, Ansys HFSS, and Ansys Q3D.
Benefits
- Competitive pay and stock bonuses
- Comprehensive health programs
- Retirement programs
- Vacation and paid time off
Job Type
Experienced Hire
- Shift: Shift 1 (United States of America)
- Location: US, Arizona, Phoenix
Annual Salary Range
- $91,150.00-172,860.00 USD
Work Model
Hybrid work model, allowing employees to split time between working on-site and off-site
About the company
At Intel, you'll work alongside world-class engineers developing technologies that power everything from artificial intelligence and cloud computing to next-generation client and edge platforms.
You'll have the opportunity to solve complex technical challenges, influence leading-edge products, and accelerate your career while helping shape the future of semiconductor innovation.
Application: UpVagas lists this opportunity from the hiring company or its recruitment platform. The application is completed at the original source.
Key details from the source
- Experience using package automation and productivity tools such as Package Layout Automation (PLA) and FIELD.
- Programming or scripting experience using Python, VB, C/C++, or similar languages to drive design automation and workflow improvements.
Full listing
UpVagas condensed repetitive or legal boilerplate to make this page easier to read. The original hiring source contains the complete job description.
