SoC Logic Design Engineer
Intel
Opportunity published from Workday · applications stay with the original hiring source.
About the opportunity
As a SoC Logic Design Engineer at Intel, you will contribute to the development, coding, and simulation of system-on-chip (SoC) designs.
You will integrate logic from various IP blocks and subsystems into a complete chip design while ensuring that power, performance, area, and timing goals are met.
This role is part of Intel's Data Center Group (DCG), focusing on advanced solutions for data-centric computing. You will collaborate on projects that shape the performance, security, and efficiency of Intel's data center offerings.
Key responsibilities
- Design and implement logic for SoC blocks and subsystems using register transfer level (RTL) coding techniques.
- Integrate IP blocks and subsystems into full chip SoC designs, ensuring seamless functionality.
- Conduct quality checks across various aspects of logic design, from RTL coding to timing, power, and area convergence.
- Optimize logic designs to meet power, performance, area, and timing targets.
- Review verification plans and resolve failing RTL tests to ensure correctness of design features.
- Collaborate with IP providers to integrate and validate IPs for SoC-level designs.
- Follow secure development practices to meet security objectives and address security threats in designs.
- Drive compliance with quality assurance standards for successful IP and SoC handoff.
Qualifications
- Bachelor's degree in Electrical Engineering, Computer Engineering, or related field with 0-1 years of hands-on experience in logic design gained through internships, academic projects, coursework, or hands-on training, OR a Master's degree in Electrical Engineering, Computer Engineering, or related field with no prior professional experience.
- Advanced experience in register transfer level (RTL) coding languages such as Verilog or VHDL.
- Basic knowledge of industry-standard tools for logic design, synthesis, and simulation (e.g., Synopsys Design Compiler, Cadence Xcelium).
- Basic knowledge of power, performance, and area optimization in SoC designs.
- Basic knowledge of timing analysis and static timing tools.
Nice to have
- Strong analytical and problem-solving skills with attention to detail.
- Effective communication skills to collaborate with cross-functional teams.
- Experience working on academic or industry projects involving SoC design and IP integration.
- Passion for learning and contributing to advancements in semiconductor technology.
Benefits
- Competitive annual salary range of $105,650.00-149,150.00 USD.
- Stock bonuses.
- Comprehensive benefit programs including health, retirement, and vacation.
Job Type
College Grad
- Shift: Shift 1 (United States of America)
Primary Location
US, California, Santa Clara
Additional Locations
US, California, Folsom, US, Oregon, Hillsboro
Work Model
On-site presence required
About the company
Intel is a global technology leader focused on creating world-changing technology that enables progress and enriches lives. Inspired by our roots, we continue to drive advancements in semiconductor technology and data-centric computing for industries worldwide.
Additional information
Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process, including recruitment or medical examination fees.
Application: UpVagas lists this opportunity from the hiring company or its recruitment platform. The application is completed at the original source.
